Many ICs are made up of millions of interconnected devices, such as transistors, resistors, capacitors, and diodes, on a single chip of semiconductor substrate. CMOS circuits and fabrication technology are commonly used in complex ICs. CMOS circuits use PMOS and NMOS devices to implement functions such as logic.
Field-programmable gate arrays (“FPGAs”) are a type of configurable logic device that often incorporate CMOS techniques in some functional blocks of the FPGA, such as logic blocks, and incorporate other techniques, such as NMOS techniques, in other functional blocks, such as interconnect blocks. An interconnect block is basically a matrix of user-selectable switches that connect circuits and nodes of other portions of the FPGA together, or connect circuits and nodes of FPGA to external pins. The interconnect and logic blocks allow the FPGA to be configured into a variety of circuits to perform user-specified operations.
Interconnect circuits often include pass gates that are controlled at a higher voltage (Vgg) than the standard logic power supply voltage (Vdd) used to drive gates in other functional blocks of the IC. Driving pass gates with sufficient Vgg, rather than Vdd, allows a digital signal at the Vdd level to pass through an NMOS pass gate without signal level reduction. If the NMOS pass gate were driven at Vdd, the output level would be Vdd minus the threshold level (Vth) of the NMOS pass gate.
Driving NMOS pass gates with Vgg also improves the speed at which data is transferred through the pass gate. The pass gate contribution of the interconnect signal delay is reduced with increasing Vgg. However, Vgg cannot be made arbitrarily high. Higher drive voltages reduce reliability through various degradation mechanisms, such as hot carrier injection (HCI) and time dependent dielectric breakdown (TDDB). An upper limit of Vgg is often determined by reliability considerations.
In many ICs, the value of Vgg can be set by programming an on-chip power supply. A fixed value of Vgg is set for a particular operating condition, such as temperature, for ICs of the same type (e.g., for FPGAs of a particular family or technology). The Vgg value is defined as the highest gate bias that insures reliable operation (i.e., without gate dielectric breakdown) for a specified time (e.g., twenty years) and at a minimum oxide thickness, generally the thinnest variation according to the fabrication process. The actual Vgg level in an FPGA follows a pre-programmed temperature response in order to compensate for temperature effects on gate dielectric reliability.
While this approach is simple and provides reliable devices, it results in a conservative Vgg setting that does not allow maximum speed because most of the devices will have a gate dielectric thickness greater than the minimum allowed within the process specifications.
Techniques for setting Vgg that provide higher performance of interconnect circuits without compromising reliability are desired.